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100 câu tắc nghiệm môn Computer Architecture - Có đáp án

Luyện tập môn Computer Architecture với bộ 100 câu trắc nghiệm trực tuyến chuẩn hóa, đầy đủ đáp án và giải thích chi tiết. Nội dung bám sát giáo trình: cấu trúc và hoạt động của bộ vi xử lý, bộ nhớ, các kiến trúc máy tính, và các công nghệ liên quan – làm bài nhanh, xem kết quả tức thì để củng cố kiến thức kiến trúc máy tính hiệu quả.

Từ khoá: trắc nghiệm computer architecture môn computer architecture 100 câu trắc nghiệm computer architecture ôn thi kiến trúc máy tính bài test computer architecture có đáp án ngân hàng câu hỏi computer architecture

Số câu hỏi: 100 câuSố mã đề: 1 đềThời gian: 1 giờ

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Câu 1: 0.2 điểm
In cache spatial locality, if a memory location is accessed, the probability that its _____ are accessed in _____ is high
A.  
near neighbours / closed future
B.  
closed neighbours / far future
C.  
closed neighbours / near future
D.  
neighbours / future
Câu 2: 0.2 điểm
What are main components of a lazer printer?
A.  
Photo drum, Laser light source, Rotating mirror and modulator, Toner cartridge
B.  
Photosensitive drum, Laser light source, Rotating mirror and laser modulator, Toner cartridge
C.  
Photosensitive drum, Laser light source, Rotating and laser modulator, Toner box
D.  
Photo drum, Laser light source, Rotating mirror and modulator, Toner box
Câu 3: 0.2 điểm
What types of pipeline conflicts is it which where are data dependency among consecutive instructions?
A.  
Branching conflict
B.  
Data conflict
C.  
Resource conflict
D.  
No conflict
Câu 4: 0.2 điểm
What are the characteristics of magnetic disks?
A.  
Volatile, hard storage, based on magnetic principles
B.  
Non-volatile, mass storage, based on ferromagnetic principles
C.  
Non-volatile, mass storage, based on magnetic principles
D.  
Volatile, hard storage, based on ferromagnetic principles
Câu 5: 0.2 điểm
What is NOT a component of the instruction set architecture?
A.  
Address format
B.  
Processor registers
C.  
Memory Addressing modes
D.  
The instruction set
Câu 6: 0.2 điểm
The computer memory system is usually organized in hierarchical levels and the memory hierarchy roles are to _____
A.  
Improve the system efficiency and reduce the sale costs
B.  
Improve the system performance and reduce the manufacturing costs
C.  
Improve the system performance and reduce the sale costs
D.  
Improve the system efficiency and reduce the manufacturing costs
Câu 7: 0.2 điểm
What is the correct name of AGP bus?
A.  
Advanced Graph Port
B.  
Advanced Graphics Port
C.  
Accelerated Graphics Port
D.  
Accelerated Graph Port
Câu 8: 0.2 điểm
The roles of cache memory are to improve the _____ and to reduce the _____
A.  
performance / costs
B.  
system performance / manufacturing expensive
C.  
system performance / manufacturing costs
D.  
CPU performance / manufacturing costs
Câu 9: 0.2 điểm
What is the function of computer mice?
A.  
Input data and control
B.  
Control
C.  
Input data
D.  
Input data or control
Câu 10: 0.2 điểm
What is the correct full name of RAID storage system?
A.  
Redundance Array of Independence Disks
B.  
Redundant Array of Independent Disks
C.  
Redundant Array of Individual Disks
D.  
Reused Array of Independent Disks
Câu 11: 0.2 điểm
What are the types of ROM memory?
A.  
PROM, EPROM, EEPROM, Flash memory
B.  
PROM, EPROM, ECPROM, Flash memory
C.  
ROM, EPROM, EEPROM, Flash memory
D.  
PROM, EPROM, EEPROM, USB
Câu 12: 0.2 điểm
In CPU pipeline, the instruction execution is divided into stages and _____ is executed by _____
A.  
a CPU component / each stage.
B.  
CPU components / stages.
C.  
stages / CPU components.
D.  
each stage / a CPU component.
Câu 13: 0.2 điểm
What are common computer system buses?
A.  
ISA, EISA, PCI, AGP, PCIe
B.  
ISA, TISA, PCI, PGP, PCIe
C.  
ISA, EISS, PCIg, AGP, PCIe
D.  
ISS, EISA, PCI, AGP, PCIex
Câu 14: 0.2 điểm
In CPU pipeline, the delayed branching technique is suitable for _____
A.  
medium pipelines.
B.  
long pipelines.
C.  
short pipelines.
D.  
very long pipelines.
Câu 15: 0.2 điểm
What are the advantages of SSDs over HDDs in computers?
A.  
Higher accessing, less expensive, more compact in size
B.  
Higher accessing speed, less power consumption, more compact in size
C.  
Higher accessing speed, less power consumption, less compact in size
D.  
Bigger accessing speed, less wire consumption, less compact in size
Câu 16: 0.2 điểm
What are the common sizes of CPU registers?
A.  
32, 64, 128, 256
B.  
4, 8, 16, 32
C.  
8, 16, 32, 64
D.  
16, 32, 64, 128
Câu 17: 0.2 điểm
What are the characteristics of the cache direct mapping technique?
A.  
Simple, fast and fixed mapping
B.  
Simple, slow and flexible mapping
C.  
Complicated, slow and flexible mapping
D.  
Complicated, fast and flexible mapping
Câu 18: 0.2 điểm
Which is a true statement about the cost role of cache memory?
A.  
If two systems have the same performance, the system with cache is cheaper.
B.  
If two systems have the same cost, the system without cache is faster.
C.  
If two systems have the same cost, the system with cache is simpler.
D.  
If two systems have the same performance, the system with cache is more expensive.
Câu 19: 0.2 điểm
What is the meaning of the instruction “ADD A, B, C”, where A, B, C are memory locations?
A.  
M[B] ⟵ M[A]+M[C]
B.  
M[C] ⟵ M[A]+M[B]
C.  
M[A] ⟵ M[A] + M[B] + M[C]
D.  
M[A] ⟵ M[B] + M[C]
Câu 20: 0.2 điểm
What are the characteristics of the cache set associative mapping technique?
A.  
Simple, slow and flexible mapping
B.  
Complicated, slow and flexible mapping
C.  
Simple, fast and fixed mapping
D.  
Complicated, fast and flexible mapping
Câu 21: 0.2 điểm
What is the addressing mode of the instruction "LOAD R1, (1000)", where Ri is a CPU register?
A.  
Indirect
B.  
Direct
C.  
Relative
D.  
Immediate
Câu 22: 0.2 điểm
What are 4 general registers of the Intel 8086 CPU?
A.  
AX, BX, CX, DX
B.  
A, X, Y, Z
C.  
AX, BX, SI, DI
D.  
A, B, C, D
Câu 23: 0.2 điểm
What is the meaning of the instruction “ADD R3, R2, R1” where Ri is a CPU register?
A.  
R1 ⟵ R2 + R3
B.  
R2 ⟵ R3 + R1
C.  
R3 ⟵ R3 + R2 + R1
D.  
R3 ⟵ R2 + R1
Câu 24: 0.2 điểm
What are the semiconductor memories?
A.  
ROM, RAM, HDD
B.  
ROM, RAM, SSD
C.  
ROM, FDD, SSD
D.  
DVD, RAM, SSD
Câu 25: 0.2 điểm
What is the elements that SSDs use to store data?
A.  
solid-state flash memory chips
B.  
RAM memory chips
C.  
solid-state flesh memory chips
D.  
ROM memory chips
Câu 26: 0.2 điểm
What is the addressing mode of the instruction "MOVE (R1), 1000", where R1 is a CPU register?
A.  
Indexed
B.  
Relative
C.  
Direct
D.  
Indirect
Câu 27: 0.2 điểm
What are the characteristics of ROM memory?
A.  
Volatile memory, magnetic memory, read only memory
B.  
Volatile memory, semiconductor memory, read only memory
C.  
Non-volatile memory, semiconductor memory, random access memory
D.  
Non-volatile memory, semiconductor memory, read only memory
Câu 28: 0.2 điểm
Which are correct names of file systems?
A.  
FAT, NTFS, Ext2, Ext4
B.  
FTA, NTFS, Ext2, Etx4
C.  
FAT, NTFS, Ext2, etx4
D.  
FTA, TFS, Ext2, Ext4
Câu 29: 0.2 điểm
What are main components of a laser printer?
A.  
Charger for drum, Charger for paper, Drying drum, Paper tray
B.  
Electrode charger for drum, Electrode charger for paper, Heating drum, Paper track
C.  
Electrode charger for drum, Electrode charger for paper, Drying drum, Paper tray
D.  
Charger for drum, Charger for paper, Drying drum, Paper track
Câu 30: 0.2 điểm
The numbers of minimum required HDDs of RAID 0, RAID 1 and RAID 10 are_____
A.  
2, 2 and 4.
B.  
2, 4 and 4.
C.  
2, 2 and 6.
D.  
4, 2 and 6
Câu 31: 0.2 điểm
Accumulator (A) register is also used in data exchange with _____ devices.
A.  
input and output
B.  
internal
C.  
computer
D.  
external
Câu 32: 0.2 điểm
What is correct statement about MAR and MBR registers?
A.  
MAR is faster than MBR.
B.  
MAR and MBR are interfaces between the CPU and system bus.
C.  
MAR is slower than MBR.
D.  
MAR is the input and MBR is the output of the CPU.
Câu 33: 0.2 điểm
What are bit widths of ISA-AT and EISA buses?
A.  
8 and 16
B.  
24 and 32
C.  
16 and 32
D.  
16 and 24
Câu 34: 0.2 điểm
Size of CPU Accumulator (A) register is equivalent to CPU_____
A.  
data size.
B.  
word length.
C.  
data word.
D.  
data word length.
Câu 35: 0.2 điểm
CPU instruction is a _____ which implements a single pre-defined operation of a processor.
A.  
binary code
B.  
binary word
C.  
hexa word
D.  
machine code
Câu 36: 0.2 điểm
Liquid crystals in LCD are semi-solid substances that are sensitive to _____
A.  
temperature or electricity.
B.  
temperature and electronics.
C.  
temperature and electricity.
D.  
heat and electricity.
Câu 37: 0.2 điểm
What is NOT a component of the instruction set architecture?
A.  
Address and data format
B.  
Processor registers
C.  
The instruction set
D.  
Memory Addressing (thiếu “modes”)
Câu 38: 0.2 điểm
What are functional keys on standard keyboards?
A.  
F1, F3, F5, F9, Fn
B.  
F1, F3, F5, F9, F11
C.  
F2, F4, F6, Fn, F8
D.  
F1, F2, F3, F4, Fn
Câu 39: 0.2 điểm
What are common arithmetic instructions supported by ALU?
A.  
ADD, SUB, DIV, MUL, SHR, ROL
B.  
ADD, SBB, DIV, MUR, SHR, ROL
C.  
ADD, SUB, DIV, MUL, SHF, ROF
D.  
ADB, SUB, DIV, MUL, SHR, ROR
Câu 40: 0.2 điểm
What are correct typical addressing modes?
A.  
Immediote, Direct, Index, Relative
B.  
Immediote. Direct, Index, Relate
C.  
Immediate, Direct, Indexed, Memory
D.  
Immediate, Direct, Indexed, Relative
Câu 41: 0.2 điểm
What is the number of words can be transferred per clock cycle of DDR2 SDRAM?
A.  
2
B.  
4
C.  
8
D.  
6
Câu 42: 0.2 điểm
What is an input peripheral device for computers?
A.  
Monitor
B.  
CD-RW drive
C.  
Printer
D.  
Plotter
Câu 43: 0.2 điểm
Internal memory is used to store instructions and data for CPU to process. Internal memory consists of _____
A.  
ROM and SAM
B.  
RON and SAM
C.  
ROM and RAM
D.  
RON and RAM
Câu 44: 0.2 điểm
Which is a correct name of SDRAM?
A.  
Synchronous DRAM
B.  
Statistical DRAM
C.  
c Static DRAM
D.  
Synchrone DRAM
Câu 45: 0.2 điểm
What are common interconnect interfaces of SSDs to computer systems?
A.  
ATA, SATA, M.2, U.2, PCI
B.  
SAS, SATA, M.2, U.8, PCIX
C.  
SAS, PATA, M., UB, PCle
D.  
SAS, SATA, M.2, U.2, PCIe
Câu 46: 0.2 điểm
Why is cache considered a smart memory?
A.  
Because cache can load enough instructions and data for CPU
B.  
Because cache can predict the need of instructions and data of CPU
C.  
Because cache can reduce the memory access time
D.  
Because cache is a very fast memory
Câu 47: 0.2 điểm
Given instruction: “ADD R2, R3, R4 / CMP R1, 0 / JNE somewhere” and each instruction is executed in 2 stages of IF and EX. How many NO-OP instructions are needed to be inserted after the instruction “JNE somewhere” to solve the branching conflict?
A.  
0
B.  
1
C.  
3
D.  
2
Câu 48: 0.2 điểm
What are the functions of computer keyboards?
A.  
Output data and Control
B.  
Input data and Control
C.  
Input data and Storage
D.  
Import data and Storage
Câu 49: 0.2 điểm
Which is the increment order of memory components in sizes?
A.  
ROM, RAM, registers, cache, HDD
B.  
ROM, RAM, HDD, registers, cache
C.  
Registers, ROM, RAM, cache, HDD
D.  
Registers, Cache, ROM, RAM, HDD
Câu 50: 0.2 điểm
Why can multi-level cache give better performance than one level cache?
A.  
Because it can balance the speed of CPU and main memory better
B.  
Because it can make the speed of main memory faster
C.  
Because it can balance the speed of CPU and RAM memory better
D.  
Because it can balance the volume of CPU and main memory better